MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 943

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

G.21.3 MDASM Timing Characteristics
MPC555 / MPC556
USER’S MANUAL
MDASM Input Pin Period
MDASM Pin Low Time
MDASM Pin High Time
Input Capture Resolution
Input Pin to Counter Bus Capture Delay
Input Pin to Interrupt Flag Delay
Input Pin to PIN Delay
Counter Bus Resolution
Output Pulse Width
Compare Resolution
Counter Bus to Pin Change
Counter Bus to Interrupt Flag Set.
NOTES:
1. If the counter bus capture occurs when the counter bus is changing then the capture is delayed one cycle.
2. Maximum resolution is obtained by setting CPSMPSL[3:0] = 0x2 and MDASMSCR_CP[7:0] = 0xFF.
3. Maximum output resolution and pulse width depends on counter (e.g., MMCSM) and MCPSM prescaler set-
MDAI input pin
In situations where the counter bus is stable when the input capture occurs the t
of 2 cycles. (the 1 cycle uncertainty is due to the synchronizer).
tings.
f
f
SYS
Characteristic
SYS
Figure G-44 MDASM Minimum Input Pin Timing Diagram
is the internal IMB clock for the IMB3 bus.
3
Table G-24 MDASM Timing Characteristics
ELECTRICAL CHARACTERISTICS
(All delays are in IMB clock periods.)
Input Modes: (IPWM, IPM, IC, DIS)
Output Modes: (OC, OPWM)
Rev. 15 October 2000
t
PPER
min
Symbol
t
t
t
t
t
t
t
CBFLG
COMR
t
t
PULW
t
PPER
CAPR
PCAP
t
PFLG
t
CBR
CBP
PLO
PHI
PIN
t
min
PLO
Min
—
—
—
4
2
2
1
2
1
2
t
min
PHI
PCAP
3
3
has a maximum delay
Max
—
—
—
3
2
—
2
2
3
2
1
2
MOTOROLA
2
G-65