MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 637

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
17.4.11 Channel Interrupt Status Register
CISR — Channel Interrupt Status Register
17.4.12 Link Register
LR — Link Register
17.4.13 Service Grant Latch Register
SGLR — Service Grant Latch Register
17.4.14 Decoded Channel Number Register
DCNR — Decoded Channel Number Register
MPC555
USER’S MANUAL
CH 15 CH 14 CH 13 CH 12 CH 11 CH 10
Bit(s)
MSB
0:15
0
0
RESET:
The channel interrupt status register (CISR) contains one interrupt status flag per
channel. Time functions specify via microcode when an interrupt flag is set. Setting a
flag causes the TPU3 to make an interrupt service request if the corresponding CIER
bit is set. To clear a status flag, read CISR, then write a zero to the appropriate bit.
CISR is the only TPU3 register that can be accessed on a byte basis.
Used for factory test only.
Used for factory test only.
Used for factory test only.
1
0
/
CH[15:0]
MPC556
Name
2
0
Channel interrupt status
0 = Channel interrupt not asserted
1 = Channel interrupt asserted
3
0
CHx[1:0]
4
0
Table 17-16 CISR Bit Descriptions
00
01
10
11
Table 17-15 Channel Priorities
5
0
TIME PROCESSOR UNIT 3
CH 9
Rev. 15 October 2000
Disabled
Service
6
0
Middle
High
Low
CH 8
7
0
CH 7
Guaranteed Time Slots
8
0
Description
CH 6
1 out of 7
2 out of 7
4 out of 7
9
0
CH 5
10
0
CH 4
11
0
0x30 4022, 0x30 4422
0x30 4024, 0x30 4424
0x30 4026, 0x30 4426
CH 3
12
0
CH 2
13
0
0x30 4020
0x30 4420
MOTOROLA
CH 1
14
0
17-19
CH 0
LSB
15
0

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