MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 385

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
MPC555
USER’S MANUAL
Bit(s)
10:12
13:31
1:6
7:9
0
/
MPC556
Name
ATM
AM
Reserved
Address mask. The address mask field of each option register provides for masking any of the
corresponding bits in the associated base register. By masking the address bits independent-
ly, external devices of different size address ranges can be used. Any clear bit masks the cor-
responding address bit. Any set causes the corresponding address bit to be used in the
comparison with the address pins. Address mask bits can be set or cleared in any order in the
field, allowing a resource to reside in more than one area of the address map. This field can
be read or written at any time.
Reserved
Address type mask. This field can be used to mask certain address type bits, allowing more
than one address space type to be assigned to a chip select. Any set bit causes the corre-
sponding address type code bits to be used as part of the address comparison. Any cleared
bit masks the corresponding address type code bit.
To instruct the memory controller to ignore address type codes as part of the address compar-
ison, clear the ATM bits.
Note: Following a system reset, the ATM bits are cleared in DMOR, except the ATM2 bit. This
means that only data accesses are dual mapped. Refer to the address types definition in
9-8.
Reserved
Table 10-10 DMOR Bit Descriptions
MEMORY CONTROLLER
Rev. 15 October 2000
Description
MOTOROLA
Table
10-33

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