UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 1063

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
Notes 1. When DAP0n = 0 and CKP0n = 0, or DAP0n = 1 and CKP0n = 1. The SIp setup time becomes “to SCKp↓”
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Caution
Remarks 1. R
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
2. When DAP0n = 0 and CKP0n = 0, or DAP0n = 1 and CKP0n = 1. The SIp hold time becomes “from SCKp↓”
3. When DAP0n = 0 and CKP0n = 0, or DAP0n = 1 and CKP0n = 1. The delay time to SOp output becomes “from
when DAP0n = 0 and CKP0n = 1, or DAP0n = 1 and CKP0n = 0.
when DAP0n = 0 and CKP0n = 1, or DAP0n = 1 and CKP0n = 0.
SCKp↑” when DAP0n = 0 and CKP0n = 1, or DAP0n = 1 and CKP0n = 0.
2. p: CSI number (p = 00, 01, 10), g: PIM and POM number (g = 3, 7)
3. f
4. V
Select the TTL input buffer for the SIp pin and SCKp pin and the N-ch open drain output (V
tolerance) mode for the SOp pin by using port input mode register g (PIMg) and port output mode
register g (POMg).
C
(Operation clock to be set by the CKS0n bit of serial mode register 0n (SMR0n). n: Channel number (n =
0 to 2))
communicating at different potentials in CSI mode.
MCK
IH
b
b
4.0 V ≤ V
2.7 V ≤ V
[Ω]:Communication line (SOp) pull-up resistance,
[F]: Communication line (SOp) load capacitance, V
: Serial array unit operation clock frequency
and V
CHAPTER 30 ELECTRICAL SPECIFICATIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
CSI mode connection diagram (communication at different potential)
IL
DD
DD
<Slave>
below are observation points for the AC characteristics of the serial array unit when
≤ 5.5 V, 2.7 V ≤ V
≤ 4.0 V, 2.3 V ≤ V
78K0R/KC3-L,
78K0R/KD3-L,
78K0R/KE3-L
SCKp
SOp
b
b
SIp
≤ 4.0 V: V
≤ 2.7 V: V
V
b
R
IH
IH
b
= 2.2 V, V
= 2.0 V, V
b
[V]: Communication line voltage
IL
IL
SCK
SO
SI
= 0.8 V
= 0.5 V
User's device
1063
DD