UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 956

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(2) When detecting level of input voltage from external input pin (EXLVI)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
• When starting operation
• When stopping operation
Figure 23-10 shows the timing of the interrupt signal generated by the low-voltage detector. The numbers in this
timing chart correspond to <1> to <7> above.
Caution Input voltage from external input pin (EXLVI) must be EXLVI < V
Be sure to clear (0) the LVION bit by using a 1-bit memory manipulation instruction.
<1>
<2>
<3>
<4>
<5> Confirm that “input voltage from the external input pin (EXLVI) ≥ detection voltage (V
<6>
<7>
<8>
Set bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 1 (detects level of input voltage from the
external input pin (EXLVI)).
Clear bit 1 (LVIMD) of the LVIM register to 0 (generates interrupt signal when the level is detected)
(default value).
when detecting the falling edge of EXLVI, or “input voltage from the external input pin (EXLVI) < detection
voltage (V
register.
Clear the interrupt request flag of LVI (LVIIF) to 0.
Release the interrupt mask flag of LVI (LVIMK).
Execute the EI instruction (when vector interrupts are used).
• Operation stabilization time (10
• Minimum pulse width (200
Mask the LVI interrupt (LVIMK = 1).
Set bit 7 (LVION) of the LVIM register to 1 (enables LVI operation).
Use software to wait for the following periods of time (Total 210
EXLVI
= 1.21 V (TYP.))” when detecting the rising edge of EXLVI, at bit 0 (LVIF) of the LVIM
μ
s (MIN.))
μ
s (MAX.))
CHAPTER 23 LOW-VOLTAGE DETECTOR
μ
s).
DD
.
EXLVI
= 1.21 V (TYP.))”
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