UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 608

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: F0122H, F0123H (SS0), F0162H, F0163H (SS1),
Symbol
(8) Serial channel start register m (SSm)
SSm
The SSm register is a trigger register that is used to enable starting communication/count by each channel.
When 1 is written a bit of this register (SSmn), the corresponding bit (SEmn) of serial channel enable status
register m (SEm) is set to 1 (Operation is enabled). Because the SSmn bit is a trigger bit, it is cleared immediately
when SEmn = 1.
The SSm register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of the SSm register can be set with an 1-bit or 8-bit memory manipulation instruction with SSmL.
Reset signal generation clears the SSm register to 0000H.
Notes 1. Those bits are invalid while operating serial allay unit 2.
Caution Be sure to clear bits 15 to 4 to “0”.
Remarks 1. m: Unit number (m = 0 to 2), n: Channel number (n = 0 to 3)
F0212H, F0213H (SS2)
SSmn
2.
15
0
1
0
2. When the SSm register is read, 0000H is always read.
If a communication operation is already under execution, the operation is stopped.
No trigger operation
Sets the SEmn bit to 1 and enters the communication wait status
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L
78K0R/KF3-L
78K0R/KG3-L
78K0R/KG3-L
14
0
Figure 14-12. Format of Serial Channel Start Register m (SSm)
13
0
12
0
μ
μ
μ
μ
PD78F1010, 78F1011, 78F1012 :
PD78F1027, 78F1028 :
PD78F1013, 78F1014 :
PD78F1029, 78F1030 :
11
0
10
0
Operation start trigger of channel n
9
0
After reset: 0000H
8
0
7
0
6
0
R/W
mn = 00 to 03
mn = 00 to 03, 10 to 13
mn = 00 to 03, 10 to 13, 20, 21
mn = 00 to 03, 10 to 13
mn = 00 to 03, 10 to 13, 20, 21
Note 2
CHAPTER 14 SERIAL ARRAY UNIT
5
0
.
4
0
3
SSm
Note 1
3
SSm
2
Note 1
2
SSm
1
1
SSm
0
0
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