UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 736

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Remark
SDAr output
SCLr output
(2) Processing flow
register mn
SDAr input
SDAr output
SCLr output
register mn
TXEmn,
RXEmn
SDAr input
SOEmn
SDRmn
TSFmn
INTIICr
SEmn
(a) When starting data reception
(b) When receiving last data
STmn
TXEmn,
RXEmn
SOEmn
SDRmn
Shift
TSFmn
INTIICr
SSmn
SEmn
STmn
Shift
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2) , r: IIC number (r = 10, 20)
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L, 78K0R/KG3-L:
D2
Output is enabled by serial
TXEmn = 1 / RXEmn = 0
communication operation
“H”
Dummy data (FFH)
D1
Shift operation
D0
ACK
Receive data
Figure 14-106. Timing Chart of Data Reception
D7
D7
D6
Output is stopped by serial communication operation
D6
TXEmn = 0 / RXEmn = 1
D5
Dummy data (FFH)
mn = 02, r = 10
mn = 02, 10, r = 10, 20
D5
TXEmn = 0 / RXEmn = 1
Dummy data (FFH)
Reception of last byte
D4
Shift operation
D4
D3
Shift operation
D3
D2
CHAPTER 14 SERIAL ARRAY UNIT
D1
D2
D0
D1
NACK
IIC operation stop
D0
SOmn bit
manipulation
ACK
Step condition
Receive data
Receive data
CKOmn bit
manipulation
SOmn bit
manipulation
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