UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 448

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(2) When f
TMRmn
Figure 8-43. Example of Set Contents of Registers During Operation as Interval Timer/Square Wave Output (2/3)
TPSm
TISm
TOm
(a) Timer mode register mn (TMRmn)
(b) Timer clock select register m (TPSm)
(c) Timer input select register m (TISm)
(d) Timer output register m (TOm)
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
Bits 7 to 4, 3 to 0
PRSmk3 to PRSmk0
CKSmn
TISmn
TOmn
Bit n
Bit n
1/0
1/0
SUB
15
1
/4 is selected as count clock (products other than 78K0R/KC3-L (40-pin))
2. f
0000
Operation clock selection
14
0: Selects CKm0 as operation clock of channel n.
1: Selects CKm1 as operation clock of channel n.
f
However, in case of the operation of square wave output and the timer output pin (TOmn), mn changes
as below.
78K0R/KC3-L (40-pin):
78K0R/KC3-L (44-pin, 48-pin): mn = 00 to 07
78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L, 78K0R/KG3-L:
0
SUB
CLK
: Subsystem clock oscillation frequency
(no division) is selected as selected operation clock by the TPSm register.
1: Selects subsystem clock divided by four (f
0: Outputs 0 from TOmn.
1: Outputs 1 from TOmn.
13
0
0000B: Selects f
k = 0 (bits 0 to 3) when CKm0 is selected and k = 1 (bits 4 to 7) when CKm1 is selected
CCSmn
12
1
Count clock selection
TERmn
MAS
11
1: Selects subsystem clock divided by four (f
0
CLK
Slave/master selection
STSmn2
(no division) as operation clock selected by the CKSmn bit of the TMRmn register.
10
0: Independent channel operation function.
0
STSmn1
0
9
mn = 02 to 07
mn = 00 to 07
mn = 00 to 07, 10 to 13
Start trigger selection
STSmn0
000B: Selects only software start.
8
0
CISmn1
1/0
SUB
7
/4).
CISmn0
1/0
6
f
SUB
00B: Detects falling edge (counts on f
01B: Detects rising edge (counts on f
10B: Detects both edges (counts on f
11B: Setting prohibited
Operation mode of channel n
/4 edge selection
000B: Interval timer
5
0
Setting of operation when counting is started
SUB
CHAPTER 8 TIMER ARRAY UNIT
0: Neither generates INTTMmn nor inverts
1: Generates INTTMmn and inverts timer
/4).
timer output when counting is started.
output when counting is started.
4
0
MDmn3
3
0
MDmn2
2
0
MDmn1
1
0
SUB
MDmn0
SUB/
SUB
1/0
0
/4 cycles).
/4 cycles).
2 cycles).
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