UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 318

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
6.2.16 Port 15
mode register 15 (PM15).
configuration register (ADPC) and in the input mode by using the PM15 register. Use these pins starting from the lower bit.
and in the output mode by using the PM15 register.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P150/ANI8
P151/ANI9
P152/ANI10
P153/ANI11
P154/ANI12
P155/ANI13
P156/ANI14
P157/ANI15
Port 15 is an I/O port with an output latch. Port 15 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for A/D converter analog input.
To use P150/ANI8 to P157/ANI15 as digital input pins, set them in the digital I/O mode by using the A/D port
To use P150/ANI8 to P157/ANI15 as digital output pins, set them in the digital I/O mode by using the ADPC register
All P150/ANI8 to P157/ANI15 are set in the digital input mode when the reset signal is generated.
Figure 6-51 shows a block diagram of port 15.
Caution See 3.2.16 AV
Digital I/O selection
Analog input selection
pin when using port 15 as a digital I/O.
ADPC Register
(
Table 6-6. Setting Functions of P150/ANI8 to P157/ANI15 Pins
μ PD78F10xx: xx = 10 to 12, 27,28)
REF
, AV
Input mode
Output mode
Input mode
Output mode
SS
78K0R/KF3-L
PM15 Register
, V
DD
, EV
DD0
CHAPTER 6 PORT FUNCTIONS (78K0R/KF3-L, 78K0R/KG3-L)
, EV
DD1
Selects ANI.
Does not select ANI.
Selects ANI.
Does not select ANI.
, V
SS
ADS Register
(
μ PD78F10xx: xx = 13, 14, 29, 30)
, EV
SS0
, EV
78K0R/KG3-L
SS1
for the voltage to be applied to the AV
Digital input
Digital output
Analog input (to be converted)
Analog input (not to be converted)
Setting prohibited
P150/ANI8 to P157/ANI15 Pins
318
REF

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