UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 560

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(3) 10-bit A/D conversion result register (ADCR)
(4) 8-bit A/D conversion result register (ADCRH)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Caution When writing to the A/D converter mode register (ADM), analog input channel specification register
Caution When writing to the A/D converter mode register (ADM), analog input channel specification register
Symbol
This register is a 16-bit register that stores the A/D conversion result in the select mode. The lower 6 bits are fixed to
0. Each time A/D conversion ends, the conversion result is loaded from the successive approximation register (SAR).
The higher 8 bits of the conversion result are stored in FFF1FH and the lower 2 bits are stored in the higher 2 bits of
FFF1EH.
The ADCR register can be read by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
This register is an 8-bit register that stores the A/D conversion result. The higher 8 bits of 10-bit resolution are stored.
The ADCRH register can be read by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
ADCR
Address: FFF1FH, FFF1EH
(ADS), and A/D port configuration register (ADPC), the contents of the ADCR register may become
undefined. Read the conversion result following conversion completion before writing to the ADM,
ADS, and ADPC registers. Using timing other than the above may cause an incorrect conversion
result to be read.
(ADS), and A/D port configuration register (ADPC), the contents of the ADCRH register may become
undefined. Read the conversion result following conversion completion before writing to the ADM,
ADS, and ADPC registers. Using timing other than the above may cause an incorrect conversion
result to be read.
Address: FFF1FH
ADCRH
Symbol
Figure 13-7. Format of 8-bit A/D Conversion Result Register (ADCRH)
Figure 13-6. Format of 10-bit A/D Conversion Result Register (ADCR)
7
FFF1FH
After reset: 00H
After reset: 0000H
6
5
R
4
R
3
2
0
CHAPTER 13 A/D CONVERTER
FFF1EH
0
1
0
0
0
0
0
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