UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 900

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
18.5.2 Software interrupt request acknowledgment
status word (PSW), then program counter (PC), the IE flag is reset (0), and the contents of the vector table (0007EH,
0007FH) are loaded into the PC and branched.
18.5.3 Multiple interrupt servicing
1). When an interrupt request is acknowledged, interrupt request acknowledgment becomes disabled (IE = 0). Therefore,
to enable multiple interrupt servicing, it is necessary to set (1) the IE flag with the EI instruction during interrupt servicing to
enable interrupt acknowledgment.
priority control. Two types of priority control are available: default priority control and programmable priority control.
Programmable priority control is used for multiple interrupt servicing.
being serviced is generated, it is acknowledged for multiple interrupt servicing. If an interrupt with a priority lower than that
of the interrupt currently being serviced is generated during interrupt servicing, it is not acknowledged for multiple interrupt
servicing. Interrupt requests that are not enabled because interrupts are in the interrupt disabled state or because they
have a lower priority are held pending. When servicing of the current interrupt ends, the pending interrupt request is
acknowledged following execution of at least one main processing instruction execution.
shows multiple interrupt servicing examples.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
A software interrupt request is acknowledged by BRK instruction execution. Software interrupts cannot be disabled.
If a software interrupt request is acknowledged, the contents are saved into the stacks in the order of the program
Restoring from a software interrupt is possible by using the RETB instruction.
Caution Do not use the RETI instruction for restoring from the software interrupt.
Multiple interrupt servicing occurs when another interrupt request is acknowledged during execution of an interrupt.
Multiple interrupt servicing does not occur unless the interrupt request acknowledgment enabled state is selected (IE =
Moreover, even if interrupts are enabled, multiple interrupt servicing may not be enabled, this being subject to interrupt
In the interrupt enabled state, if an interrupt request with a priority equal to or higher than that of the interrupt currently
Table 18-5 shows relationship between interrupt requests enabled for multiple interrupt servicing and Figure 18-15
CHAPTER 18 INTERRUPT FUNCTIONS
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