UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 224

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
5.2.11 Port 14
Remark √: Mounted
mode register 14 (PM14). When the P141 pin is used as an input port, use of an on-chip pull-up resistor can be specified
in 1-bit units by pull-up resistor option register 14 (PU14).
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P140/PCLBUZ0
P141/PCLBUZ1
P140 is a port dedicated to output and is provided with an output latch.
P141 is an I/O port with an output latch. P141 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for clock/buzzer output.
Reset signal generation sets P141 to input mode.
Figures 5-25 and 5-26 show block diagrams of port 14.
Caution To use P140/PCLBUZ0 and P141/PCLBUZ1 as general-purpose ports, set bit 7 of clock output select
Remark The P140 pin outputs a low level when it is used as a port function pin and a reset is effected. If P140 is set
P14:
RD:
WR××: Write signal
registers 0 and 1 (CKS0, CKS1) to “0”, which is the same as their default status setting.
to output a high level, the output signal of P140 can be dummy-output as the CPU reset signal.
Port register 14
Read signal
WR
RD
PORT
(
μ PD78F100y: y = 0 to 3)
40-pin
78K0R/KC3-L
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
−
−
Reset signal
Output latch
44-pin
Alternate
function
(P140)
P140
P140
Figure 5-25. Block Diagram of P140
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
√
−
(
Set by software
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
√
−
(
μ PD78F100y: y = 7 to 9)
P140/PCLBUZ0
78K0R/KE3-L
√
√
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