UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 471

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Figure 8-63. Example of Set Contents of Registers When One-Shot Pulse Output Function Is Used (Master Channel)
TMRmn
TOMm
TOEm
TOLm
TOm
(a) Timer mode register mn (TMRmn)
(b) Timer output register m (TOm)
(c) Timer output enable register m (TOEm)
(d) Timer output level register m (TOLm)
(e) Timer output mode register m (TOMm)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 2, 4, 6)
TOMmn
TOEmn
CKSmn
TOLmn
TOmn
Bit n
Bit n
Bit n
Bit n
1/0
15
0
0
0
0
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: mn = 00, 02, 04, 06
78K0R/KF3-L, 78K0R/KG3-L:
Operation clock selection
14
0: Selects CKm0 as operation clock of channels n.
1: Selects CKm1 as operation clock of channels n.
0
0: Outputs 0 from TOmn.
0: Stops the TOmn output operation by counting operation.
0: Cleared to 0 when TOMmn = 0 (master channel output mode).
0: Sets master channel output mode.
13
0
CCSmn
12
0
Count clock selection
TERmn
MAS
11
0: Selects operation clock.
1
Slave/master selection
STSmn2
10
1: Master channel.
0
STSmn1
9
0
Start trigger selection
STSmn0
001B: Selects the TImn pin input valid edge.
8
1
mn = 00, 02, 04, 06, 10, 12
CISmn1
1/0
7
CISmn0
1/0
6
Selection of TImn pin input edge
00B: Detects falling edge.
01B: Detects rising edge.
10B: Detects both edges.
11B: Setting prohibited
Operation mode of channel n
100B: One-count mode
5
0
CHAPTER 8 TIMER ARRAY UNIT
4
0
Start trigger during operation
MDmn3
0: Trigger input is invalid.
3
1
MDmn2
2
0
MDmn1
1
0
MDmn0
0
0
471

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