UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 945

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
23.4 Operation of Low-Voltage Detector
(1) Used as reset (LVIMD = 1)
(2) Used as interrupt (LVIMD = 0)
more than or less than the detection level can be checked by reading the low-voltage detection flag (LVIF: bit 0 of the low-
voltage detection register (LVIM)).
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
The low-voltage detector can be used in the following two modes.
While the low-voltage detector is operating, whether the supply voltage or the input voltage from an external input pin is
• If LVISEL = 0, compares the supply voltage (V
• If LVISEL = 1, compares the input voltage from the external input pin (EXLVI) and detection voltage (V
• If LVISEL = 0, compares the supply voltage (V
• If LVISEL = 1, compares the input voltage from the external input pin (EXLVI) and detection voltage (V
Remark LVIMD bit: Bit 1 of the LVIM register
when V
V ±0.1 V), generates an internal reset signal when EXLVI < V
Remark The low-voltage detector (LVI) can be set to ON by an option byte by default. If it is set to ON to raise
(V
V ±0.1 V). When EXLVI drops lower than V
≥ V
DD
EXLVI
< V
DD
LVISEL bit: Bit 2 of the LVIM register
), generates an interrupt signal (INTLVI).
LVI
< V
the power supply from the POC detection voltage (V
signal is generated when the supply voltage (V
the internal reset signal is generated when the supply voltage (V
±0.1 V).
) or when V
LVI
, and releases internal reset when V
DD
becomes V
LVI
or higher (V
EXLVI
DD
DD
(EXLVI < V
) and detection voltage (V
) and detection voltage (V
DD
DD
≥ V
≥ V
LVI
DD
LVI
), generates an interrupt signal (INTLVI).
) < detection voltage (V
EXLVI
.
EXLVI
CHAPTER 23 LOW-VOLTAGE DETECTOR
) or when EXLVI becomes V
POR
, and releases internal reset when EXLVI ≥ V
= 1.61 V (TYP.)) or lower, the internal reset
LVI
LVI
DD
), generates an internal reset signal
). When V
) < detection voltage (V
LVI
= 2.07 V ±0.2 V). After that,
DD
drops lower than V
EXLVI
or higher (EXLVI
LVI
EXLVI
EXLVI
= 2.07 V
= 1.21
= 1.21
EXLVI
945
LVI
.