UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 1102

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
31.6 Peripheral Functions Characteristics
31.6.1 Serial array unit
(1) During communication at same potential (UART mode) (dedicated baud rate generator output)
Caution Select the normal input buffer for the RxDq pin and the normal output mode for the TxDq pin by using
Remarks 1.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Transfer rate
TxDq
RxDq
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
(T
A
= −40 to +85°C, 1.8 V ≤ V
port input mode register g (PIMg) and port output mode register g (POMg).
2. f
Parameter
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn).
m: Unit number (m = 0 to 2), n: Channel number (n = 0 to 3))
q: UART number (q = 0 to 4), g: PIM and POM number (g = 0, 1, 14)
MCK
: Serial array unit operation clock frequency
UART mode bit width (during communication at same potential) (reference)
UART mode connection diagram (during communication at same potential)
CHAPTER 31 ELECTRICAL SPECIFICATIONS (78K0R/KF3-L, 78K0R/KG3-L)
78K0R/KF3-L,
78K0R/KG3-L
DD
Symbol
= EV
DD0
= EV
1.8 V ≤ V
f
2.7 V ≤ V
TxDq
RxDq
CLK
= 20 MHz, f
DD1
≤ 5.5 V, V
DD
DD
Baud rate error tolerance
Conditions
≤ 5.5 V
≤ 5.5 V
High-/Low-bit width
1/Transfer rate
MCK
= f
SS
CLK
= EV
,
Rx
Tx
SS0
= EV
User's device
MIN.
SS1
= AV
SS
TYP.
= 0 V)
MAX.
f
MCK
3.3
/6
Mbps
Unit
bps
1102

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