UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 1107

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
Caution Select the normal input buffer and the N-ch open drain output (V
Remarks 1.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
SCLr
SDAr
and the normal output mode for the SCLr pin by using port input mode register g (PIMg) and port
output mode register g (POMg).
2.
3.
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number (m = 0,
1), n: Channel number (n = 0, 2), mn = 02, 10)
R
C
r: IIC number (r = 10, 20), g: PIM and POM number (g = 0, 14)
f
MCK
b
b
[Ω]:Communication line (SDAr) pull-up resistance,
[F]: Communication line (SCLr, SDAr) load capacitance
Simplified I
: Serial array unit operation clock frequency
2
C mode serial transfer timing (during communication at same potential)
CHAPTER 31 ELECTRICAL SPECIFICATIONS (78K0R/KF3-L, 78K0R/KG3-L)
t
LOW
1/f
SCL
t
HIGH
DD
tolerance) mode for the SDAr pin
t
HD:DAT
t
SU:DAT
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