UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 1068

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
30.6.4 A/D converter characteristics
(T
Notes 1. Excludes quantization error (±1/2 LSB).
30.6.5 Programmable gain amplifier characteristics
(T
Remark Slew rate: The change with respect to the rise or fall of the output voltage
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Resolution
Overall error
Conversion time
Zero-scale error
Full-scale error
Integral non-linearity error
Differential non-linearity error
Analog input voltage
Input offset voltage
Input voltage range
Maximum output voltage
Slew rate
Gain
Operation stabilization wait time
A
A
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
= −40 to +85°C, 1.8 V ≤ V
= −40 to +85°C, 2.7 V ≤ V
2. This value is indicated as a ratio (%FSR) to the full-scale value.
V/
Operation stabilization wait time:
Parameter
Parameter
Notes 1, 2
μ
s: The change in voltage per 1
Notes 1, 2
Notes 1, 2
CHAPTER 30 ELECTRICAL SPECIFICATIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
Note 1
Note 1
DD
DD
= EV
≤ 5.5 V, 2.7 V ≤ AV
R
AINL
t
EZS
EFS
ILE
DLE
V
Symbol
CONV
VIO
VI
VO
SR
SR
RG
t
Symbol
AIN
ES
AMP
AMP
AMP
F
R
AMP
DD
≤ 5.5 V, 1.8 V ≤ AV
4.0 V ≤ AV
2.7 V ≤ AV
1.8 V ≤ AV
1.8 V ≤ AV
Rising edge
Falling edge
μ
Time required until a state is entered where the DC and AC specifications of
the programmable gain amplifier are satisfied after the operation of the
programmable gain amplifier has been enabled (OAEN of programmable
gain amplifier control register (OAM) = 1)
s
REF
REF
REF
REF
REF
≤ 5.5 V
≤ 5.5 V
≤ 4.0 V Low voltage mode
≤ 5.5 V
≤ V
Conditions
Conditions
DD
REF
4.0 V ≤ AV
2.7 V ≤ AV
4.0 V ≤ AV
2.7 V ≤ AV
, V
High speed mode 1
Normal mode
High speed mode 2
Normal mode
≤ V
SS
= AV
DD
, V
REF
REF
REF
REF
SS
SS
≤ 5.5 V
< 4.0 V
≤ 5.5 V
< 4.0 V
= EV
= 0 V)
SS
0.1AV
0.1AV
= AV
MIN.
AV
24.1
/gain
MIN.
2.5
5.2
3.5
8.6
3.5
2.5
2
4
SS
SS
REF
REF
= 0 V)
4 to 12
TYP.
TYP.
±5
0.9AV
0.9AV
±0.35
±0.25
±0.25
AV
MAX.
MAX.
66.6
66.6
66.6
66.6
66.6
±2.5
±1.5
/gain
±10
10
3
REF
REF
REF
%FSR
%FSR
%FSR
times
LSB
LSB
Unit
V/
V/
V/
V/
Unit
mV
bit
μ
μ
μ
μ
μ
μ
V
V
V
s
s
s
s
s
μ
μ
μ
μ
s
s
s
s
s
1068

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