UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 931

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
21.1 Register for Confirming Reset Source
store which source has generated the reset request.
LVIRF flags.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Many internal reset generation sources exist in the 78K0R/Kx3-L. The reset control flag register (RESF) is used to
The RESF register can be read by an 8-bit memory manipulation instruction.
RESET input, reset by power-on-clear (POC) circuit, and reading the RESF register clear TRAP, WDRF, INIRF, and
Notes 1.
Cautions 1. Do not read data by a 1-bit memory manipulation instruction.
The status of the RESF register when a reset request is generated is shown in Table 21-3.
Address: FFFA8H
Symbol
RESF
2.
2. When the LVI default start function (bit 0 (LVIOFF) of 000C1H = 0) is used, LVIRF flag may
The value after reset varies depending on the reset source.
The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.
become 1 from the beginning depending on the power-on waveform.
WDRF
LVIRF
TRAP
TRAP
INIRF
7
0
1
0
1
0
1
0
1
After reset: 00H
Figure 21-5. Format of Reset Control Flag Register (RESF)
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
6
0
Note 1
R
Internal reset request by execution of illegal instruction
Internal rese request t by a reset processing check error
5
0
Internal reset request by low-voltage detector (LVI)
Internal reset request by watchdog timer (WDT)
WDRF
4
0
3
CHAPTER 21 RESET FUNCTION
2
0
INIRF
Note 2
1
LVIRF
0
931