UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 881

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(2) Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H, MK2L)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Caution Be sure to set bit 0 of the MK0H register, bits 4 and 5 of the MK1H register (in case of 78K0R/KC3-L
Notes 1. That bit is not provided in the 40-pin and 44-pin products of the 78K0R/KC3-L.
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
The MK0L, MK0H, MK1L, MK1H, and MK2L registers can be set by a 1-bit or 8-bit memory manipulation instruction.
When the MK0L and MK0H, and MK1L and MK1H registers are combined to form 16-bit registers MK0 and MK1, they
can be set by a 16-bit memory manipulation instruction. Using the MK2L register as the MK2 register can be set also
by using a 16-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark If an instruction that writes data to this register is executed, the number of instruction execution clocks
Address: FFFE4H
Address: FFFE5H
Address: FFFE6H
Address: FFFE7H
Address: FFFD4H
Symbol
Symbol
Symbol
Symbol
Symbol
2. Those bits are not provided in the 40-pin product of the 78K0R/KC3-L.
MK0H
MK1H
MK0L
MK1L
MK2L
Figure 18-3. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H, MK2L)
(40-pin), bits 1, 2, 4, and 5), and bits 5 to 7 of the MK2L register (in case of 78K0R/KC3-L (40-pin), bits
4 to 7) to 1.
increases by 2 clocks.
SREMK0
TMMK03
TMMK04
XXMKX
PMK5
<7>
<7>
<7>
<7>
7
1
0
1
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
Interrupt servicing enabled
Interrupt servicing disabled
CSIMK01
TMMK02
SRMK0
MDMK
PMK4
<6>
<6>
<6>
<6>
6
1
R/W
R/W
R/W
R/W
R/W
CSIMK00
TMMK01
STMK0
PMK3
<5>
<5>
<5>
5
1
5
1
PMK7
DMAMK1
TMMK00
PMK2
<4>
<4>
<4>
<4>
4
1
Interrupt servicing control
Note 2
IICAMK
DMAMK0
KRMK
PMK1
PMK6
<3>
<3>
<3>
<3>
<3>
CHAPTER 18 INTERRUPT FUNCTIONS
Note 1
RTCIMK
CMPMK1
SREMK1
TMMK07
PMK0
<2>
<2>
<2>
<2>
<2>
Note 2
RTCMK
CMPMK0
TMMK06
SRMK1
LVIMK
<1>
<1>
<1>
<1>
<1>
Note 2
CSIMK10
WDTIMK
TMMK05
IICMK10
STMK1
ADMK
<0>
<0>
<0>
<0>
0
1
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