UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 743

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
Note 1
78K0R/Kx3-L
14.9 Relationship Between Register Settings and Pins
See Tables 14-5 to 14-8 if using the 78K0R/KC3-L, 78K0R/KD3-L, and 78K0R/KE3-L, and see Tables 14-9 to 14-16 if
using the 78K0R/KF3-L and 78K0R/KG3-L.
14.9.1 78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L
Notes 1. Serial channel enable register 0 (SE0) is a read-only status register which is set using serial channel start
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
SE
Remark X: Don’t care
00
0
1
Tables 14-5 to 14-16 show the relationship between register settings and pins for each channel of the serial array unit.
0mn
MD
0
0
0
0
Table 14-5. Relationship Between Register Settings and Pins (Channel 0: CSI00, UART0 Transmission)
2. When channel 1 is set to UART0 reception, this pin becomes an RxD0 function pin (refer to Table 14-6). In this
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 14.3 (12) Serial output register
5. When using UART0 transmission and reception in a pair, set channel 1 to UART0 reception (refer to Table 14-6).
MD0
case, operation stop mode or UART0 transmission must be selected for channel 0.
register 0 (SS0) and serial channel stop register 0 (ST0).
m (SOm).
01
0
1
0
1
SOE
00
0
0
1
1
0
1
1
1
SO0
Note 4
Note 4
Note 4
Note 4
Note 4
0/1
0/1
0/1
0/1
0/1
0
1
1
1
CKO
Note 4
Note 4
Note 4
0/1
0/1
0/1
00
1
1
1
1
1
TXE
00
0
0
1
1
0
1
1
1
RXE
00
0
1
0
1
1
0
1
0
Note 3
Note 3
PM
75
×
1
1
1
0
0
0
×
Note 3
Note 3
P75 PM
×
×
×
×
×
1
1
1
Note 2
Note 3
Note 3
Note 3
Note 3
74
×
1
×
1
1
×
1
×
Note 2
Note 3
Note 3
Note 3
Note 3
P74
×
×
×
×
×
×
×
×
Note 3
Note 3
Note 3
PM
73
×
×
0
0
×
0
0
0
Note 3
Note 3
Note 3
P73 Operation mode
×
×
1
1
×
1
1
1
Operation stop
Master CSI00
Master CSI00
Master CSI00
transmission
Slave CSI00
Slave CSI00
Slave CSI00
transmission
transmission
transmission
transmission
/reception
/reception
reception
reception
UART0
mode
Note 5
CHAPTER 14 SERIAL ARRAY UNIT
KR5/P75
KR5/P75
KR5/P75
(output)
(output)
(output)
SCK00/
SCK00
SCK00
SCK00
SCK00
SCK00
SCK00
(input)
(input)
(input)
RxD0/KR4/
Pin Function
KR4/P74/
KR4/P74/
KR4/P74
KR4/P74
KR4/P74
P74
RxD0
RxD0
SI00/
SI00
SI00
SI00
SI00
Note 2
TxD0/KR3/
KR3/P73
KR3/P73
KR3/P73
SO00/
SO00
SO00
SO00
SO00
TxD0
P73
743

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