UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 619

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address F0053H
Address F0057H
Address F0050H
Address F0051H
Address F005EH
(17) Port output mode registers 0, 1, 3, 7, 14 (POM0, POM1, POM3, POM7, POM14)
POM14
Symbol
Symbol
Symbol
Symbol
Symbol
POM3
POM7
POM0
POM1
These registers set the output mode of ports 0, 1, 3, 7, and 14 in 1-bit units.
The port output mode registers to be set differ depending on the product.
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: POM3, POM7
78K0R/KF3-L, 78K0R/KG3-L:
The POM0, POM1, POM3, POM7, and POM14 registers can be set by a 1-bit or 8-bit memory manipulation
instruction.
Reset signal generation clears the POM0, POM1, POM3, POM7, and POM14 registers to 00H.
Figure 14-23. Format of Port Output Mode Registers 0, 1, and 14 (POM0, POM1, POM14)
POMmn
POMmn
Figure 14-22. Format of Port Output Mode Registers 3 and 7 (POM3 and POM7)
0
1
0
1
7
0
7
0
7
0
7
0
7
0
After reset: 00H
After reset: 00H
After reset: 00H
After reset: 00H
After reset: 00H
Normal output mode
N-ch open-drain output (V
Normal output mode
N-ch open-drain output (V
6
0
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
R/W
(78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
POM75
5
0
5
5
0
5
0
5
0
(78K0R/KF3-L, 78K0R/KG3-L)
Pmn pin output buffer selection (m = 0, 1, 14; n = 0, 2 to 4)
Pmn pin output buffer selection (m = 3, 7; n = 0 to 3, 5)
DD
DD
tolerance) mode
tolerance) mode
POM0, POM1, POM14
POM144
POM04
4
0
4
0
4
4
0
4
POM143
POM73
POM03
3
0
3
3
3
0
3
CHAPTER 14 SERIAL ARRAY UNIT
POM142
POM32
POM72
POM02
POM12
2
2
2
2
2
POM31
1
1
0
1
0
1
0
1
0
POM30
POM70
POM10
0
0
0
0
0
0
0
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