UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 328

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(5) Port output mode registers (POM0, POM1, POM14)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(4) Port input mode registers (PIM0, PIM1, PIM14)
POM14
Symbol
Symbol
PIM14
POM0
POM1
PIM0
PIM1
These registers set the input buffer of P03, P04, P10, P11, P142, or P143 in 1-bit units.
TTL input buffer can be selected during serial communication with an external device of the different potential.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
These registers set the output mode of P02 to P04, P10, P12, or P142 to P144 in 1-bit units.
N-ch open drain output (V
the different potential, and for the SDA10 and SDA20 pins during simplified I
of the same potential.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
POMmn
PIMmn
7
0
0
7
0
0
1
0
0
0
0
1
Normal input buffer
TTL input buffer
Normal output mode
N-ch open-drain output (V
6
0
0
0
6
0
0
0
DD
5
0
0
0
5
0
0
0
tolerance) mode can be selected during serial communication with an external device of
Figure 6-58. Format of Port Input Mode Register
Figure 6-59. Format of Port Input Mode Register
POM144 POM143 POM142
POM04
PIM04
4
4
0
0
0
DD
tolerance) mode
PIM143
POM03
CHAPTER 6 PORT FUNCTIONS (78K0R/KF3-L, 78K0R/KG3-L)
PIM03
3
0
3
0
Pmn pin output mode selection
Pmn pin input buffer selection
(m = 0, 1, 14; n = 0, 2 to 4)
PIM142
POM02
POM12
(m = 0, 1, 14; n = 0 to 4)
2
0
0
2
PIM11
1
0
0
1
0
0
0
POM10
PIM10
0
0
0
0
0
0
2
C communication with an external device
Address
Address
F0040H
F0044H
F004EH
F0050H
F0051H
F005EH
After reset
After reset
00H
00H
00H
00H
00H
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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