UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 465

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Operation clock
Figure 8-58. Example of Basic Timing of Operation as Input Signal High-/Low-Level Width Measurement
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
Figure 8-57. Block Diagram of Operation as Input Signal High-/Low-Level Width Measurement
TImn pin
2. TSmn:
TEmn:
TImn:
TCRmn:
TDRmn:
OVF:
CKm1
CKm0
However, in case of the timer input pin (TImn) , mn changes as below.
78K0R/KC3-L (40-pin):
78K0R/KC3-L (44-pin, 48-pin): mn = 00 to 07
78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L, 78K0R/KG3-L:
INTTMmn
TCRmn
TDRmn
TSmn
TEmn
TImn
detection
OVF
Edge
Bit n of timer channel start register m (TSm)
Bit n of timer channel enable status register m (TEm)
TImn pin input signal
Timer/counter register mn (TCRmn)
Timer data register mn (TDRmn)
Bit 0 of timer status register mn (TSRmn)
FFFFH
0000H
0000H
a
mn = 02 to 07
mn = 00 to 07
mn = 00 to 07, 10 to 13
register mn (TCRmn)
register mn (TDRmn)
Timer counter
Timer data
a
CHAPTER 8 TIMER ARRAY UNIT
b
controller
Interrupt
b
c
c
Interrupt signal
(INTTMmn)
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