UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 611

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: F012AH, F012BH
Address: F016AH, F016BH
Address: F021AH, F021BH
SOE2
(11) Serial output enable register m (SOEm)
Symbol
Symbol
Symbol
SOE0
SOE1
The lower 8 bits of the SOEm register can be set with an 1-bit or 8-bit memory manipulation instruction with
SOEmL.
Caution Be sure to clear bits 15 to 3 of the SOE0 register, bits 1 and 15 to 3 of the SOE1 register, and bits
Note
Remark m: Unit number (m = 0 to 2), n: Channel number (n = 0 to 2)
The SOEm register is a register that is used to enable or stop output of the serial communication operation of each
channel.
Channel n that enables serial output cannot rewrite by software the value of the SOmn bit of serial output register
m (SOm) to be described below, and a value reflected by a communication operation is output from the serial data
output pin.
For channel n, whose serial output is stopped, the SOmn bit value of the SOm register can be set by software, and
that value can be output from the serial data output pin. In this way, any waveform of the start condition and stop
condition can be created by software.
The SOEm register can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears the SOEm register to 0000H.
Note
SOE
mn
15
15
15
0
1
0
0
0
15 to 2 of the SOE2 registers to “0”.
SOE2 register is only mounted in the 78K0R/KF3-L (
PD78F1029, 78F1030).
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L
78K0R/KF3-L
78K0R/KG3-L
78K0R/KG3-L
Stops output by serial communication operation.
Enables output by serial communication operation.
14
14
14
0
0
0
Figure 14-15. Format of Serial Output Enable Register m (SOEm)
After reset: 0000H
After reset: 0000H
After reset: 0000H
13
13
13
0
0
0
μ
μ
μ
μ
12
12
12
0
0
0
PD78F1010, 78F1011, 78F1012 :
PD78F1027, 78F1028 :
PD78F1013, 78F1014 :
PD78F1029, 78F1030 :
11
11
11
0
0
0
R/W
R/W
R/W
10
10
10
0
0
0
Serial output enable/stop of channel n
9
0
9
0
9
0
8
0
8
0
8
0
7
0
7
0
7
0
μ
6
0
6
0
6
0
PD78F1027, 78F1028) and 78K0R/KG3-L (
mn = 00 to 02
mn = 00 to 02, 10, 12
mn = 00 to 02, 10, 12, 20, 21
mn = 00 to 02, 10, 12
mn = 00 to 02, 10, 12, 20, 21
CHAPTER 14 SERIAL ARRAY UNIT
5
0
5
0
5
0
4
0
4
0
4
0
3
0
3
0
3
0
SOE
SOE
02
12
2
2
2
0
SOE
SOE
01
21
1
1
0
1
SOE
SOE
SOE
00
10
20
0
0
0
611
μ