UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 499

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: FFF9FH
(4) Real-time counter control register 2 (RTCC2)
RTCC2
Symbol
The RTCC2 register is an 8-bit register that is used to control the interval interrupt function and the RTCDIV pin.
The RTCC2 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Notes The RCLOE0 and RCLOE2 bits must not be enabled at the same time.
Cautions 1. Change the ICT2, ICT1, and ICT0 bits when RINTE = 0.
RCLOE2
RCKDIV
RINTE
RINTE
<7>
2. When the output from the RTCDIV pin is stopped, the output continues after a maximum of
3. After the real-time counter starts operating, the output width of the RTCDIV pin may be shorter
0
1
1
1
1
1
1
1
0
1
0
1
After reset: 00H
two clocks of f
stopped immediately after entering the high level, a pulse of at least one clock width of f
be generated.
than as set during the first interval period.
Note
Figure 9-5. Format of Real-Time Counter Control Register 2 (RTCC2)
Output of the RTCDIV pin is disabled.
Output of the RTCDIV pin is enabled.
The RTCDIV pin outputs 512 Hz. (1.95 ms)
The RTCDIV pin outputs 16.384 kHz. (0.061 ms)
RCLOE2
ICT2
<6>
×
0
0
0
0
1
1
1
R/W
XT
and enters the low level. While 512 Hz is output, and when the output is
RCKDIV
ICT1
<5>
×
0
0
1
1
0
0
1
Selection of RTCDIV pin output frequency
ICT0
×
0
1
0
1
0
1
×
4
0
RTCDIV pin output control
Interval interrupt is not generated.
2
2
2
2
2
2
2
6
7
8
9
10
11
12
/f
/f
/f
/f
/f
/f
/f
XT
XT
XT
XT
XT
XT
XT
(1.953125 ms)
(3.90625 ms)
(7.8125 ms)
(15.625 ms)
3
0
(31.25 ms)
(62.5 ms)
(125 ms)
Interval interrupt (INTRTCI) selection
CHAPTER 9 REAL-TIME COUNTER
ICT2
2
ICT1
1
ICT0
0
XT
may
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