UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 645

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Caution
After setting the SAUmEN bit of peripheral enable register 0/1 (PER0/PER1) to 1, be sure to set
serial clock select register m (SPSm) after 4 or more f
Figure 14-41. Flowchart of Master Reception (in Single-Reception Mode)
SMRmn, SCRmn: Setting communication
SDRmn[15:9]:
SOm:
Clearing the SAUmEN bit of the
Setting the SAUmEN bit of the
Setting transfer rate by the
Writing 1 to the SSmn bit
Writing 1 to the STmn bit
Starting CSI communication
Writing dummy data to
End of communication
PER0/PER1 register to 1
PER0/PER1 register to 0
SIOp (= SDRmn[7:0])
Reception completed?
SIOp (=SDRmn[7:0])
Port manipulation
Starting reception
Transfer end interrupt
SPSm register
Yes
Reading the
Yes
generated?
Setting transfer rate
Setting SCKp output
register
No
No
Specify the initial settings while the
SEmn bit of serial channel enable
status register m (SEm) is 0 (operation
is stopped).
CLK
CHAPTER 14 SERIAL ARRAY UNIT
clocks have elapsed.
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