UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 344

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: FFFA0H
Symbol
CMC
Cautions 1. The CMC register can be written only once after reset release, by an 8-bit memory
(Cautions and Remark are given on the next page.)
Note
OSCSELS
AMPHS1
EXCLK
EXCLK
AMPH
Note
OSCSELS bit is not provided in the 78K0R/KC3-L (40-pin). In the 78K0R/KC3-L (40-pin), bit 4 is
fixed to 0.
Figure 7-4. Format of Clock Operation Mode Control Register (CMC)
7
0
0
1
1
0
1
0
0
1
1
0
1
After reset: 00H
2. After reset release, set the CMC register before X1 or XT1 oscillation is started as set
3. Be sure to set the AMPH bit to 1 if the X1 clock oscillation frequency exceeds 10 MHz.
4. When the CMC register is used at the default value (00H), be sure to set 00H to this
5. The XT1 oscillator is a circuit with low amplification in order to achieve low-power
manipulation instruction.
by the clock operation status control register (CSC).
register after reset release in order to prevent malfunctioning during a program loop.
consumption. Note the following points when designing the circuit.
Input port mode
XT1 oscillation mode
2 MHz ≤ f
10 MHz < f
• Pins and circuit boards include parasitic capacitance.
• When using the ultra-low power consumption oscillation (AMPHS1 = 1) as the
OSCSEL
OSCSEL
AMPHS0
Subsystem clock pin operation mode
oscillation evaluation using a circuit board to be actually used and confirm that
there are no problems.
mode of the XT1 oscillator, use the recommended resonators described in
CHAPTER 30 ELECTRICAL SPECIFICATIONS (78K0R/KC3-L, 78K0R/KD3-L,
78K0R/KE3-L) or CHAPTER 31 ELECTRICAL SPECIFICATIONS (78K0R/KF3-L,
78K0R/KG3-L).
6
0
1
0
1
0
1
0
1
X
X
≤ 10 MHz
≤ 20 MHz
Input port mode
X1 oscillation mode
Input port mode
External clock input mode
Low power consumption oscillation (default)
Normal oscillation
Ultra-low power consumption oscillation
High-speed system clock
R/W
pin operation mode
0
5
Control of X1 clock oscillation frequency
OSCSELS
Note
4
XT1 oscillator oscillation mode selection
Input port
Crystal resonator connection
Input port
Crystal/ceramic resonator connection
Input port
Input port
3
0
XT1/P123 pin
X1/P121 pin
CHAPTER 7 CLOCK GENERATOR
AMPHS1
2
External clock input
AMPHS0
X2/EXCLK/P122 pin
1
XT2/P124 pin
Therefore, perform
AMPH
0
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