UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 588

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Figure 14-3 shows the block diagram of the serial array unit 1.
Serial clock I/O pin
(when CSI40: SCK40)
Serial data input pin
(when CSI40: SI40)
(when UART4: RxD4)
Figure 14-3. Block Diagram of Serial Array Unit 1 (
When UART4
f
Peripheral enable
register 1 (PER1)
CLK
SAU2EN
SNFEN40
elimination
Channel 0
enabled/
disabled
TXE
Channel 1
Noise
20
PM50
RXE
20
PRS
213
detection
Edge
DAP
Edge/level
20
Edge/level
PRS
212
detection
detection
Serial clock select register 2 (SPS2)
Serial communication operation setting register 20 (SCR20)
CK21
4
0
CK21
Output latch
Selector
CKP
PRS
(P50)
20
211
f
SCK
0
f
CLK
EOC
20
CK20
PRS
/2
210
Prescaler
0
to f
0
CK20
CLK
CKS20
PTC
201
PRS
203
/2
Serial mode register 20 (SMR20)
f
11
MCK
0
CCS20 STS20 MD202
Selector
PTC
200
PRS
202
(Clock division setting block)
4
1
f
f
CLK
CLK
DIR
20
PRS
201
/2
/2
0
11
1
to
SLC
201
PRS
200
CKO21
Serial data register 20 (SDR20)
Serial output register 2 (SO2)
MD201
SLC
200
CKO20
f
TCLK
μ
DLS
202
PD78F1027, 78F1028, 78F1029, 78F1030 only)
(Buffer register block)
0
DLS
201
Shift register
Communication controller
Communication controller
0
(for transmission)
CSI40 or UART4
DLS
200
Mode selection
Mode selection
(for reception)
0
UART4
CHAPTER 14 SERIAL ARRAY UNIT
TSF
0
20
Serial status register 20 (SSR20)
BFF
1
0
0
0
0
0
20
Serial flag clear trigger
register 20 (SIR20)
Output latch
FECT
FEF
1
0
0
0
0
0
20
(P52)
20
Error controller
Error controller
SOE21 SOE20
SO21
ST21
SE21
SS21
controller
PECT
controller
PEF
Interrupt
0
Output
20
20
SOL20
SO20
SE20
SS20
ST20
OVCT
OVF
20
PM52
20
information
Clear
Error
Serial channel enable
status register 2 (SE2)
Serial channel start
register 2 (SS2)
Serial channel stop
register 2 (ST2)
Serial output enable
register 2 (SOE2)
Serial output level
register 2 (SOL2)
Noise filter enable
register 0 (NFEN0)
SNFEN
40
Serial transfer end interrupt
(when CSI40: INTCSI40)
(when UART4: INTST4)
Serial transfer end interrupt
(when UART4: INTSR4)
Serial transfer error interrupt
(INTSRE4)
Serial data output pin
(when CSI40: SO40)
(when UART4: TxD4)
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