UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 163

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
Address Special Function Register (SFR) Name
Notes 1. The reset value of the RESF register varies depending on the reset source.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
FFF98H Year count register
FFF99H Watch error correction register
FFF9AH Alarm minute register
FFF9BH Alarm hour register
FFF9CH Alarm week register
FFF9DH Real-time counter control
FFF9EH Real-time counter control
FFF9FH Real-time counter control
FFFA0H Clock operation mode control
FFFA1H Clock operation status control
FFFA2H Oscillation stabilization time
FFFA3H Oscillation stabilization time
FFFA4H System clock control register
FFFA5H Clock output select register 0
FFFA6H Clock output select register 1
FFFA8H Reset control flag register
FFFA9H Low-voltage detection register
FFFAAH Low-voltage detection level
FFFABH Watchdog timer enable register
2. The reset value of the LVIM register varies depending on the reset source and the setting of the option byte.
3. The reset value of the LVIS register varies depending on the reset source.
4. The reset value of the WDTE register is determined by the setting of the option byte.
register 0
register 1
register 2
register
register
counter status register
select register
select register
YEAR
SUBCUD
ALARMWM
ALARMWH
ALARMWW
RTCC0
RTCC1
RTCC2
CMC
CSC
OSTC
OSTS
CKC
CKS0
CKS1
RESF
LVIM
LVIS
WDTE
Symbol
Table 4-5. SFR List (4/6)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Manipulable Bit Range
1-bit
−
−
−
−
−
√
√
√
−
√
√
−
√
√
√
−
√
√
−
8-bit
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
16-bit
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
CHAPTER 4 CPU ARCHITECTURE
Undefined
After Reset
1A/9A
0EH
00H
C0H
00H
00H
00H
12H
00H
00H
00H
00H
00H
00H
07H
09H
00H
00H
Note 2
Note 3
Note 4
Note 1
−
−
−
−
−
−
−
−
√
√
√
√
√
−
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
−
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
−
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
163
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√