UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 237

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
(3) Pull-up resistor option registers (PUxx)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Symbol
PU12
PU1
PU3
PU4
PU5
PU7
These registers specify whether the on-chip pull-up resistors are to be used or not. On-chip pull-up resistors can be
used in 1-bit units only for the bits set to input mode of the pins to which the use of an on-chip pull-up resistor has
been specified in these registers. On-chip pull-up resistors cannot be connected to bits set to output mode and bits
used as alternate-function output pins, regardless of the settings of these registers.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Note In the case of the 40-pin product, be sure to clear PU52 bit of the PU5 register to “0”.
PUmn
7
0
0
0
0
0
0
0
1
On-chip pull-up resistor not connected
On-chip pull-up resistor connected
Figure 5-36. Format of Pull-up Resistor Option Register (78K0R/KC3-L)
6
0
0
0
0
0
0
PU75
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
5
0
0
0
0
0
PU74
4
0
0
0
0
0
PU13
PU73
Pmn pin on-chip pull-up resistor selection
3
0
0
0
0
(m = 1, 3 to 5, 7, 12 ; n = 0 to 5)
PU52
PU12
PU32
PU72
2
0
0
Note
PU11
PU31
PU41
PU51
PU71
1
0
PU120
PU10
PU30
PU40
PU50
PU70
0
Address
F003CH
F0031H
F0033H
F0034H
F0035H
F0037H
After reset
00H
00H
00H
00H
00H
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
237

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