UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 76

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
2.2.10 P120 to P124 (port 12)
request input, potential input for external low-voltage detection, connecting resonator for main system clock, connecting
resonator for subsystem clock, and external clock input for main system clock.
Remark √: Mounted
(1) Port mode
(2) Control mode
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P120/INTP0/
EXLVI
P121/X1
P122/X2/
EXCLK
P123/XT1
P124/XT2
P120 functions as an I/O port. P121 to P124 function as ant input port. These pins also function as external interrupt
The following operation modes can be specified in 1-bit units.
(b) CMP0M, CMP1M
(c) INTP3, INTP7
(d) PGAI
P120 functions as an I/O port. P120 can be set to input or output port using port mode register 12 (PM12). Use of an
on-chip pull-up resistor can be specified by pull-up resistor option register 12 (PU12).
P121 to P124 function as an input port.
P120 to P124 function as external interrupt request input, potential input for external low-voltage detection, connecting
resonator for main system clock, connecting resonator for subsystem clock, and external clock input for main system
clock.
(a) INTP0
(b) EXLVI
These are the input voltage pins on the (−) sides of comparators 0 and 1.
These are the external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising
and falling edges) can be specified.
This is a programmable gain amplifier input pin.
This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising and
falling edges) can be specified.
This is a potential input pin for external low-voltage detection.
(
μ PD78F100y: y = 0 to 3)
40-pin
−
−
78K0R/KC3-L
√
√
√
CHAPTER 2 PIN FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
44-pin
√
√
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
√
√
√
√
√
(
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
√
√
√
√
√
(
μ PD78F100y: y = 7 to 9)
78K0R/KE3-L
√
√
√
√
√
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