UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 573

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
The setting methods are described below.
<Change the channel>
<Complete A/D conversion>
<1> Set bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 1.
<2> Select the conversion time by using bits 5 to 1 (FR2 to FR0, LV1, and LV0) of the A/D converter mode
<3> Set bit 0 (ADCE) of the ADM register to 1.
<4> Set the channel to be used in the analog input mode by using bits 4 to 0 (ADPC4 to ADPC0) of the A/D port
<5> Set the programmable gain amplifier operation to set the programmable gain amplifier output (PGAI pin) for
<6> Select a channel to be used by using bits 6 and 3 to 0 (ADOAS, ADS3 to ADS0) of the analog input channel
<7> Set bit 7 (ADCS) of the ADM register to 1 to start A/D conversion.
<8> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<9> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<10> Change the channel using bits 6 and 3 to 0 (ADOAS, ADS3 to ADS0) of the ADS register to start A/D
<11> When one A/D conversion has been completed, an interrupt request signal (INTAD) is generated.
<12> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<13> Clear the ADCS bit to 0.
<14> Clear the ADCE bit to 0.
<15> Clear bit 5 (ADCEN) of peripheral enable register 0 (PER0) to 0.
Cautions 1. Make sure the period of <3> to <7> is 1
register (ADM), and select the operation mode by using bit 6 (ADMD) of the ADM register.
configuration register (ADPC), bits 7 to 0 (PM27 to PM20) of port mode register 2 (PM2), bits 7 to 0 (PM157
to PM150) of port mode register 15 (PM15), and bit 0 (PM80) of port mode register 8 (PM8).
the analog input channel (refer to 10.4.1 Starting comparator and programmable gain amplifier
operation).
specification register (ADS).
conversion.
2. <3> may be done between <4> and <6>.
3. <3> can be omitted. However, ignore data of the first conversion after <7> in this case.
4. The period from <8> to <11> differs from the conversion time set using bits 5 to 1 (FR2 to
FR0, LV1, LV0) of the ADM register. The period from <10> to <11> is the conversion time set
using the FR2 to FR0, LV1, and LV0 bits.
μ
s or more.
CHAPTER 13 A/D CONVERTER
573