UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 347

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Note
Remark f
The fastest instruction can be executed in 1 clock of the CPU clock in the 78K0R/Kx3-L. Therefore, the relationship
between the CPU clock (f
f
f
f
f
f
f
f
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
SUB
(Value set by the
MDIV2 to MDIV0
/2
CPU Clock
/2
/2
/2
/2
/2
The 78K0R/KC3-L (40-pin) doesn’t have the subsystem clock.
2
3
4
5
bits)
f
MAIN
SUB
Table 7-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
Remarks 1. f
Cautions 1. Be sure to set bit 3 to 1.
: Subsystem clock frequency
: Main system clock frequency (f
0.1
0.2
0.4
0.8
1.6
3.2
2. ×:
2. The clock set by the CSS, MCM0, and MDIV2 bits to MDIV0 is supplied to the CPU
3. If the subsystem clock is used as the peripheral hardware clock, the operations of
At 10 MHz
Operation
μ
μ
μ
μ
μ
μ
High-Speed System Clock
s
s
s
s
s
s
f
f
f
f
CLK
IH
IH20
IH1
MX
SUB
and peripheral hardware. If the CPU clock is changed, therefore, the clock supplied
to peripheral hardware (except the real-time counter, clock output/buzzer output, and
watchdog timer) is also changed at the same time.
peripheral function when changing the CPU/peripheral hardware clock.
the A/D converter and IICA are not guaranteed. For the operating characteristics of
the peripheral hardware, refer to the chapters describing the various peripheral
hardware as well as CHAPTER 30 ELECTRICAL SPECIFICATIONS (78K0R/KC3-L,
78K0R/KD3-L, 78K0R/KE3-L) or CHAPTER 31 ELECTRICAL SPECIFICATIONS
(78K0R/KF3-L, 78K0R/KG3-L).
:
: High-speed system clock frequency
: 1 MHz Internal high-speed oscillation clock frequency
) and the minimum instruction execution time is as shown in Table 7-2.
: Subsystem clock frequency
: 20 MHz Internal high-speed oscillation clock frequency
(MCM0 = 1)
don’t care
Internal high-speed oscillation clock frequency
−
0.05
0.1
0.2
0.4
0.8
1.6
Main System Clock (CSS = 0)
At 20 MHz
Operation
μ
μ
μ
μ
μ
μ
s
s
s
s
s
s
Minimum Instruction Execution Time: 1/f
IH
,f
IH20
, or f
0.125
0.25
(default)
0.5
1.0
2.0
4.0
At 8 MHz (TYP.)
Internal High-Speed Oscillation
Operation
MX
μ
μ
μ
μ
μ
s (TYP.)
s (TYP.)
s (TYP.)
s (TYP.)
)
μ
s (TYP.)
s (TYP.)
Clock (MCM0 = 0)
−
0.05
0.1
0.2
0.4
0.8
1.6
At 20 MHz (TYP.)
Operation
μ
μ
μ
μ
μ
CHAPTER 7 CLOCK GENERATOR
μ
s (TYP.)
s (TYP.)
s (TYP.)
s (TYP.)
s (TYP.)
s (TYP.)
CLK
61
At 32.768 kHz Operation
Consequently, stop each
Subsystem Clock
μ
s
(CSS = 1)
−
−
−
−
−
−
Note
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