UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 864

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Note The DST0 flag is automatically cleared to 0 when a DMA transfer is completed.
Remark
Writing the DEN0 flag is enabled only when DST0 = 0. To terminate a DMA transfer without waiting for
occurrence of the interrupt of DMA0 (INTDMA0), set the DST0 bit to 0 and then the DEN0 bit to 0 (for details,
refer to 17.5.5 Forced termination by software).
Figure 17-9. Example of Setting for UART Consecutive Reception + ACK Transmission
This is an example where a software trigger is used as a DMA start source.
If ACK is not transmitted and if only data is consecutively received from UART, the UART reception end
interrupt (INTSR0) can be used to start DMA for data reception.
Setting for UART reception
DRA0 = FE00H
DBC0 = 0040H
User program
DMC0 = 00H
DSA0 = 12H
processing
DEN0 = 1
DST0 = 1
Start
DEN0 = 0
DST0 = 0
INTSR0 occurs.
RETI
End
INTDMA0
occurs.
Note
INTSR0 interrupt routine
DMA0 transfer
STG0 = 1
P10 = 1
P10 = 0
RETI
CHAPTER 17 DMA CONTROLLER
Hardware operation
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