UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 459

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Note 78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L:
TAU
default
setting
Channel
default
setting
Operation
start
During
operation
Operation
stop
TAU
stop
78K0R/KF3-L, 78K0R/KG3-L:
Sets the TAU0EN bit of peripheral enable registers 0, 2
(PER0, PER2) to 1.
Sets timer clock select register 0 (TPS0).
Sets timer mode register mn (TMRmn) (determines
operation mode of channel and selects the detection
edge).
Sets interval (period) value to timer data register 00
(TDR00).
Clears the TOM00 bit of timer output mode register 0
(TOM0) to 0 (master channel output mode).
Clears the TOL00 bit to 0.
Sets the TO00 bit and determines default level of the
TO00 output.
Sets the TOE00 bit to 1 and enables operation of TO00.
Clears the port register and port mode register to 0.
Sets the TOE00 bit to 1 (only when operation is
resumed).
Sets the TS00 bit to 1.
Set value of the TDR00 register can be changed.
The TCR00 register can always be read.
The TSR00 register is not used.
Set values of the TO0 and TOE0 registers can be
changed.
Set values of the TMR00 register, TOM00, and TOL00
bits cannot be changed.
The TT00 bit is set to 1.
The TOE00 bit is cleared to 0 and value is set to the TO00 bit.
To hold the TO00 pin output level
When holding the TO00 pin output level is not
necessary
The TAU0EN bit of the PER0 or PER2 register is cleared
to 0.
Determines clock frequencies of CK00 and CK01.
The TS00 bit automatically returns to 0 because it is a
trigger bit.
The TT00 bit automatically returns to 0 because it is a
trigger bit.
Clears the TO00 bit to 0 after the value to be held is
set to the port register.
Switches the port mode register to input mode.
Note
Figure 8-52. Operation Procedure When Frequency Divider Function Is Used
Software Operation
Note
TAU0EN bit of the PER2 register
TAU0EN bit of the PER0 register
Power-off status
Power-on status. Each channel stops operating.
Channel stops operating.
(Clock is supplied and some power is consumed.)
The TO00 pin goes into Hi-Z output state.
The TO00 default setting level is output when the port mode
register is in output mode and the port register is 0.
TO00 does not change because channel stops operating.
The TO00 pin outputs the TO00 set level.
TE00 = 1, and count operation starts.
Value of the TDR00 register is loaded to timer/counter
register 00 (TCR00) at the count clock input. INTTM00 is
generated and TO00 performs toggle operation if the MD000
bit of the TMR00 register is 1.
Counter (TCR00) counts down. When count value reaches
0000H, the value of the TDR00 register is loaded to the
TCR00 register again, and the count operation is continued.
By detecting TCR00 = 0000H, INTTM00 is generated and
TO00 performs toggle operation.
After that, the above operation is repeated.
TE00 = 0, and count operation stops.
The TO00 pin outputs the TO00 set level.
The TO00 pin output level is held by port function.
The TO00 pin output level goes into Hi-Z output state.
Power-off status
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
The TCR00 register holds count value and stops.
The TO00 output is not initialized but holds current status.
All circuits are initialized and SFR of each channel is also
initialized.
(The TO00 bit is cleared to 0 and the TO00 pin is set to
port mode).
CHAPTER 8 TIMER ARRAY UNIT
Hardware Status
459