UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 609

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(9) Serial channel stop register m (STm)
Address: F0124H, F0125H (ST0), F0164H, F0165H (ST1)
The lower 8 bits of the STm register can be set with an 1-bit or 8-bit memory manipulation instruction with STmL.
Notes 1. Those bits are invalid while operating serial allay unit 2.
Caution Be sure to clear bits 15 to 4 to “0”.
Remarks 1. m: Unit number (m = 0 to 2), n: Channel number (n = 0 to 3)
Symbol
The STm register is a trigger register that is used to enable stopping communication/count by each channel.
When 1 is written a bit of this register (STmn), the corresponding bit (SEmn) of serial channel enable status
register m (SEm) is cleared to 0 (operation is stopped). Because the STmn bit is a trigger bit, it is cleared
immediately when SEmn = 0.
The STm register can set written by a 16-bit memory manipulation instruction.
Reset signal generation clears the STm register to 0000H.
STm
F0214H, F0215H (ST2)
STm
2. Communication stops while holding the value of the control register and shift register, and the status of
n
0
1
the serial clock I/O pin, serial data output pin, and each error flag (FEFmn: framing error flag, PEFmn:
parity error flag, OVFmn: overrun error flag).
2. When the STm register is read, 0000H is always read.
15
0
No trigger operation
Clears the SEmn bit to 0 and stops the communication operation
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L
78K0R/KF3-L
78K0R/KG3-L
78K0R/KG3-L
14
0
Figure 14-13. Format of Serial Channel Stop Register m (STm)
13
0
μ
μ
μ
μ
PD78F1010, 78F1011, 78F1012 :
PD78F1027, 78F1028 :
12
PD78F1013, 78F1014 :
PD78F1029, 78F1030 :
0
11
0
10
0
Operation stop trigger of channel n
After reset: 0000H
9
0
8
0
7
0
mn = 00 to 03
mn = 00 to 03, 10 to 13
mn = 00 to 03, 10 to 13, 20, 21
mn = 00 to 03, 10 to 13
mn = 00 to 03, 10 to 13, 20, 21
Note 2
CHAPTER 14 SERIAL ARRAY UNIT
R/W
6
0
.
5
0
4
0
STm
3
Note 1
3
STm
2
Note 1
2
STm
1
1
STm
0
0
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