UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 872
UPD78F1009GB-GAH-AX
Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1009GB-GAH-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Maskable
Interrupt
Notes 1.
Type
2.
3.
Default
Priority
Note 1
40
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
The default priority determines the sequence of interrupts if two or more maskable interrupts occur
simultaneously. Zero indicates the highest priority and 47 indicate the lowest priority.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 18-1.
INTSRE4 is only mounted in the 78K0R/KF3-L (
PD78F1029 and 78F1030).
INTTM00
INTTM01
INTTM02
INTTM03
INTAD
INTRTC
INTRTCI
INTKR
INTST2
/INTCSI20
/INTIIC20
INTP6
INTTM13
INTMD
INTTM04
INTTM05
INTTM06
INTTM07
INTSR2
INTP6
INTP7
INTP8
INTP9
INTP10
INTSRE4
Note 3
INTP11
Name
Key return signal detection
UART2 transmission transfer end
or buffer empty interrupt/CSI20
transfer end or buffer empty
interrupt/IIC20 transfer end
UART2 reception transfer end
UART4 reception
communication error
occurrence
End of timer channel 0 count
or capture
End of timer channel 1 count
or capture
End of timer channel 2 count
or capture
End of timer channel 3 count
or capture
End of A/D conversion
Fixed-cycle signal of real-time
counter/alarm match
detection
Interval signal detection of
real-time counter
Pin input edge detection
End of timer channel 13 count
or capture
End of division operation
End of timer channel 4 count
or capture
End of timer channel 5 count
or capture
End of timer channel 6 count
or capture
End of timer channel 7 count
or capture
Pin input edge detection
Pin input edge detection
Interrupt Source
Table 18-1. Interrupt Source List (2/3)
Trigger
Internal
External
Internal
External
Internal
External
Internal
External
External
Internal/
μ
PD78F1027 and 78F1028) and the 78K0R/KG3-L (
Address
0054H
CHAPTER 18 INTERRUPT FUNCTIONS
002CH
002EH
003AH
003CH
003EH
004AH
004CH
004EH
Vector
0030H
0032H
0034H
0036H
0038H
0040H
0042H
0044H
0046H
0048H
0050H
0052H
Table
Configuration
Type
Basic
(A)
(C)
(A)
(A)
(B)
(A)
(B)
(B)
Note 2
√
√
√
√
√
−
−
√
−
−
−
√
√
√
√
√
−
√
−
−
−
−
−
−
√
√
√
√
√
√
√
√
−
−
−
√
√
√
√
√
−
√
√
−
−
−
−
−
√
√
√
√
√
√
√
√
−
−
−
√
√
√
√
√
−
√
√
−
−
−
−
−
√
√
√
√
√
√
√
√
−
−
−
√
√
√
√
√
−
√
√
−
−
−
−
−
√
√
√
√
√
√
√
√
−
−
−
√
√
√
√
√
−
√
√
−
−
−
−
−
Note
√
√
√
√
√
√
√
√
√
√
√
−
√
√
√
√
√
−
√
√
√
√
√
3
Note
872
√
√
√
√
√
√
√
√
√
√
√
−
√
√
√
√
√
−
√
√
√
√
√
3
μ
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