UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 192

• Manufacturer Part Number: UPD78F1009GB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3-L 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1009GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
5.2.1 Port 0
mode register 0 (PM0). When the P00 and P01 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 0 (PU0).
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P00/TI00
P11/TO00
Port 0 is an I/O port with an output latch. Port 0 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for timer I/O.
Reset signal generation sets port 0 to input mode.
Figures 5-1 and 5-2 show block diagrams of port 0.
Caution To use P01/TO00 as a general-purpose port, set bit 0 (TO00) of timer output register 0 (TO0) and bit 0
P0:
PU0:
PM0:
RD:
WRxx:
Remark With products not provided with an EV
(TOE00) of timer output enable register 0 (TOE0) to “0”, which is the same as their default status
setting.
WR
WR
WR
RD
Port register 0
Pull-up resistor option register 0
Port mode register 0
Read signal
Write signal
PORT
PM
PU
(
μ PD78F100y: y = 0 to 3)
40-pin
78K0R/KC3-L
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
−
−
Output latch
Alternate
function
44-pin
PM00
PU00
(P00)
PU0
PM0
P0
Figure 5-1. Block Diagram of P00
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
−
−
DD
or EV
SS
pin, replace EV
(
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
√
√
DD
with V
DD
, or replace EV
(
μ PD78F100y: y = 7 to 9)
EV
DD
P-ch
78K0R/KE3-L
√
√
P00/TI00
SS
with V
SS
192
.