UPD78F1009GB-GAH-AX Renesas Electronics America, UPD78F1009GB-GAH-AX Datasheet - Page 699

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UPD78F1009GB-GAH-AX

Manufacturer Part Number
UPD78F1009GB-GAH-AX
Description
MCU 16BIT 78K0R/KX3-L 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1009GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1009GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Caution After setting the SAUmEN bit of peripheral enable register 0/1 (PER0/PER1) to 1, be sure to set
Remark
<1> Select the buffer empty interrupt.
Writing 1 to the MDmn0 bit
Figure 14-82. Flowchart of UART Transmission (in Continuous Transmission Mode)
serial clock select register m (SPSm) after 4 or more f
<1> to <6> in the figure correspond to <1> to <6> in Figure 14-81
Transmission (in Continuous Transmission Mode).
Yes
No
SMRmn, SCRmn: Setting communication
SDRmn[15:9]:
SOLmn:
SOm, SOEm:
Clearing 0 to the MDmn0 bit
Clearing the SAUmEN bit of the
Setting the SAUmEN bit of the
Setting operation clock by
Writing 1 to the SSmn bit
Writing 1 to the STmn bit
Starting UART communication
Writing transmit data to
Communication continued?
End of communication
PER0/PER1 register to 1
PER0/PER1 register to 0
TXDq (=SDRmn[7:0])
Transmitting next data?
the SPSm register
Port manipulation
Buffer empty interrupt
Transfer end interrupt
Yes
TSFmn = 1?
No
No
Yes
Setting transfer rate
Setting output data level
Setting output
generated?
generated?
Yes
<3>
<5>
<2>
<4>
<6>
CLK
Yes
No
No
CHAPTER 14 SERIAL ARRAY UNIT
clocks have elapsed.
Specify the initial settings while the
SEmn bit of serial channel enable status
register m (SEm) is 0 (operation is
stopped).
Timing Chart of UART
699

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