DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 10

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS3161/DS3162/DS3163/DS3164
Figure 10-47. FEAC Controller Block Diagram........................................................................................................ 185
Figure 10-48. FEAC Codeword Format................................................................................................................... 186
Figure 10-49. Line Encoder/Decoder Block Diagram .............................................................................................. 187
Figure 10-50. B3ZS Signatures ............................................................................................................................... 189
Figure 10-51. HDB3 Signatures............................................................................................................................... 189
Figure 10-52. BERT Block Diagram ........................................................................................................................ 190
Figure 10-53. PRBS Synchronization State Diagram.............................................................................................. 192
Figure 10-54. Repetitive Pattern Synchronization State Diagram........................................................................... 193
Figure 13-1. JTAG Block Diagram........................................................................................................................... 361
Figure 13-2. JTAG TAP Controller State Machine .................................................................................................. 362
Figure 13-3. JTAG Functional Timing...................................................................................................................... 365
Figure 14-1. DS3164 Pin Assignments—400-Lead BGA ........................................................................................ 366
Figure 14-2. DS3163 Pin Assignments—400-Lead BGA ........................................................................................ 367
Figure 14-3. DS3162 Pin Assignments—400-Lead BGA ........................................................................................ 368
Figure 14-4 DS3161 Pin Assignments—400-Lead BGA......................................................................................... 369
Figure 18-1. Clock Period and Duty Cycle Definitions............................................................................................. 374
Figure 18-2. Rise Time, Fall Time, and Jitter Definitions......................................................................................... 374
Figure 18-3. Hold, Setup, and Delay Definitions (Rising Clock Edge) .................................................................... 374
Figure 18-4. Hold, Setup, and Delay Definitions (Falling Clock Edge).................................................................... 375
Figure 18-5. To/From Hi-Z Delay Definitions (Rising Clock Edge).......................................................................... 375
Figure 18-6. To/From Hi-Z Delay Definitions (Falling Clock Edge) ......................................................................... 375
Figure 18-7. Micro Interface Nonmultiplexed Read/Write Cycle ............................................................................. 381
Figure 18-8. Micro Interface Multiplexed Read Cycle.............................................................................................. 382