DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 98

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.2.2 Sources of Clock Output Pin Signals
The clock output pins can be sourced from many clock sources. The clock sources are the transmit input clocks
pins (TCLKIn), the receive clock input pins (RLCLKn), and the clock signals in the clock rate adapter circuit
(CLAD). The default clock source for the receive logic is the RLCLKn pin. The default clock source for the transmit
logic is the CLAD clocks.
The bits LM, LBM[2:0], LOOPT and CLADC are located in the port configuration registers.
Table 10-1
configured. Putting the device in loopback will typically mux in a different clock than the normal clock source.
Table 10-1. All Possible Clock Sources Based on Mode and Loopback
Mode
Loop Timed
Normal
Normal
Normal
Normal
Normal
Table 10-2
Table 10-2. Source Selection of TLCLK Clock Signal
Signal
TLCLKn
Figure 10-2
identifies the source of the output signal TLCLKn based on certain variables and register bits.
identifies the framer clock source and the line clock source depending on the mode that the device is
shows the source of the TCLKOn signals.
LOOPT
PORT.C
R3
Loopback
Any
None
LLB
PLB
DLB
LLB and DLB
1
0
0
0
0
0
0
0
0
0
0
0
0
(PORT.CR4)
LBM[2:0]
XXX
10X
10X
010
110
000
001
100
111
000
001
100
111
RX framer clock
source
RLCLKn
RLCLKn
RLCLKn
RLCLKn
Same as TX
Same as TX
LLB or
PLB?
LLB
LLB
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NA
TCLKIn or
TX framer clock
source
Same as RX
TCLKIn or
CLAD
TCLKIn or
CLAD
Same as RX
TCLKIn or
CLAD
CLAD
CLADC
(PORT.
CR3)
X
X
X
0
0
0
0
0
1
1
1
1
1
RLCLKn
RLCLKn
RLCLKn
CLAD
CLAD
CLAD
CLAD
CLAD
TCLKIn
TCLKIn
TCLKIn
TCLKIn
TCLKIn
Source
TX line clock
source
Same as RX
Same as TX
Same as RX
Same as RX
Same as TX
RLCLKn