DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 80

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.3.5.3
Figure 8-34
ports. Prior to clock edge 1, the POS device started a packet transfer to PHY port '1'. On clock edge 2, PHY port '1'
de-asserts its TDXA to indicate to the POS device that it cannot accept any more data transfers. On clock edge 3,
the POS device stops the packet transfer to PHY port '1', and starts a packet transfer to PHY port '2' by leaving
TEN asserted, placing PHY port '2's address on TADR, placing the first byte of packet data on TDATA, and
asserting TSOX to indicate the transfer of the first byte of the packet. On clock edge 7, PHY port '2' de-asserts its
TDXA to indicate to the POS device that it cannot accept any more data transfers. On clock edge 8, the POS
device stops the packet transfer to PHY port '2', and resumes a packet transfer to PHY port '3'. On clock edge 12,
PHY port '2' indicates to the POS device that it can accept a block of packet data by asserting its TDXA. Also, the
POS device indicates it is transferring the last byte of packet data by asserting TEOP. On clock edge 13, the POS
device ends the packet transfer to PHY port '3', and starts a packet transfer to PHY port '4'. On clock edge 15, PHY
port '1' indicates to the POS device that it can accept a block of packet data. On clock edge 17, PHY port '4' de-
asserts its TDXA to indicate to the POS device that it cannot accept any more data transfers. On clock edge 18, the
POS device stops the packet transfer to PHY port '4', and resumes a packet transfer to PHY port '1'.
Figure 8-34. Transmit Multiple Packet Transfer to Different PHY ports (Direct Status
Mode)
TDXA[1]
TDXA[2]
TDXA[3]
TDXA[4]
Transfer
To Port
TDATA
TSOX
TEOP
TERR
TADR
TCLK
TEN
POS-PHY Level 2 Functional Timing
shows a multi-device transmit interface in byte transfer mode multiple packet transfer to different PHY
P34
1
'1'
'1'
2
P35
3
P1
4
P2
5
'2'
'2'
…
6
P41
7
P42
8
P19
9
P20
10
'3'
'3'
…
11
P63
12
P64
13
P1
14
P2
15
'4'
'4'
…
16
P49
17
P50
18
P36
19
'1'
'1'
P37
20
P38