DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 303

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.11.2 Fractional Receive Side Register Map
The receive side utilizes three registers.
Table 12-42. Receive Side Register Map
12.11.2.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 0: Receive Section A Source Select (RSASS) – When 0, Section A of each receive data group will contain
fractional overhead. When 1, Section A of each receive data group will contain payload data.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 12 to 0: Receive Data Group Size (RDGS[12:0]) – These thirteen bits indicate the number of bits contained
within each receive data group. A values of 0000h and 0001h both result in a receive data group size of one bit.
(1,3,5,7)4Ch
(1,3,5,7)4Ah
(1,3,5,7)4Eh
(1,3,5,7)48h
Address
RDGS7
15
15
--
--
--
0
7
0
0
7
0
FRAC.RDGSR Fractional Receive Data Group Size Register
FRAC.RSASR Fractional Receive Section A Size Register
FRAC.RCR
Register
--
RDGS6
14
14
--
--
--
0
6
0
0
6
0
FRAC.RCR
Fractional Receive Control Register
(1,3,5,7)48h
FRAC.RDGSR
Fractional Receive Data Group Size Register
(1,3,5,7)4Ah
Unused
Fractional Receive Control Register
RDGS5
13
13
--
--
--
0
5
0
0
5
0
Register Description
RDGS12
RDGS4
12
12
--
--
0
0
0
0
4
4
RDGS11
RDGS3
11
11
--
--
0
3
0
0
3
0
RDGS10
RDGS2
10
10
--
--
0
2
0
0
2
0
RDGS9
RDGS1
--
--
9
0
1
0
9
0
1
0
RDGS8
RDGS0
RSASS
--
8
0
0
0
8
0
0
0