DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 266
![IC TRPL ATM/PACKET PHY 400-PBGA](/photos/6/87/68748/400-bga_21-0306_sml.jpg)
DS3163
Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3163.pdf
(384 pages)
Specifications of DS3163
Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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12.9.2 Trail Trace Receive Side Register Map
The receive side utilizes seven registers.
Table 12-32. Trail Trace Receive Side Register Map
12.9.2.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 3: Receive Multiframe Alignment Disable (RMAD) – When 0, multiframe alignment is performed. When 1,
multiframe alignment is disabled and the trail trace bytes are stored starting with a random byte.
Bit 2: Receive Expected Trail Trace Comparison Enable (RETCE) – When 0, expected trail trace comparison is
disabled. When 1, expected trail trace comparison is performed. Note: When the RMAD bit is one, expected trail
trace comparison is disabled regardless of the setting of this bit.
Bit 1: Receive Data Inversion Enable (RDIE) – When 0, the incoming data is directly passed on for trail trace
processing. When 1, the incoming data is inverted before being passed on for trail trace processing.
Bit 0: Receive Bit Reordering Enable (RBRE) – When 0, bit reordering is disabled (The first bit received is the
MSB TT.RIR.RTD[7] of the byte). When 1, bit reordering is enabled (The first bit received is the LSB
TT.RIR.RTD[0] of the byte).
(0,2,4,6)FAh
(0,2,4,6)FCh
(0,2,4,6)FEh
(0,2,4,6)F0h
(0,2,4,6)F2h
(0,2,4,6)F4h
(0,2,4,6)F6h
(0,2,4,6)F8h
Address
15
--
--
0
7
0
TT.RSRIE
TT.RSRL
Register
TT.RIAR
TT.RCR
TT.RSR
TT.RIR
TT.EIR
--
14
--
--
0
6
0
Trail Trace Receive Control Register
Trail Trace Receive Identifier Address Register
Trail Trace Receive Status Register
Trail Trace Receive Status Register Latched
Trail Trace Receive Status Register Interrupt Enable
Unused
Trail Trace Receive Identifier Register
Trail Trace Expected Identifier Register
TT.RCR
Trail Trace Receive Control Register
(0,2,4,6)F0h
Reserved
13
--
0
5
0
Register Description
Reserved
12
--
0
0
4
RMAD
11
--
0
3
0
RETCE
10
--
0
2
0
RDIE
--
9
0
1
0
RBRE
--
8
0
0
0
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