DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 235
DS3163
Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3163.pdf
(384 pages)
Specifications of DS3163
Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 7: Receive Line Clock Activity Status Latched (RLCLKA) This bit will be set when the signal on the RLCLKn
pin for this port is active.
Bit 6: Transmit Input Clock Activity Status Latched (TCLKIA) This bit will be set when the signal on the TCLKIn
pin for this port is active.
Bit 0: Performance Monitoring Update Status Latched (PMSL) This bit will be set when the PORT.SR.PMS
status bit changes from low to high. This bit will also set the PORT.ISR.PSR status bit if the PORT.SRIE.PMUIE bit
is enabled. The interrupt pin will be driven when this bit is set, the PORT.SRIE.PMUIE bit is set, and the
PORT.SRIE.PMSIE bit are set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 0: Performance Monitoring Update Latched Status Interrupt Enable (PMSIE) The interrupt pin will be
driven when this bit is enabled and the PORT.SRL.PMSL bit is set and the bit in GL.ISRIE.PISRIE[4:1] that
corresponds to this port is enabled.
RLCLKA
15
15
--
--
--
7
0
7
0
TCLKIA
14
14
--
--
--
6
0
6
0
PORT.SRL
Port Status Register Latched
(0,2,4,6)54h
PORT.SRIE
Port Status Register Interrupt Enable
(0,2,4,6)56h
13
13
--
--
--
--
5
0
5
0
12
12
--
--
--
--
0
0
4
4
11
11
--
--
--
--
3
0
3
0
Reserved
Reserved
10
10
--
--
2
0
2
0
Reserved
Reserved
--
--
9
1
9
0
1
0
PMSIE
PMSL
--
--
8
0
8
0
0
0
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