DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 326

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS3161/DS3162/DS3163/DS3164
Bit 5: Transmit Fill Cell Header Type (TFCH) – When 0, an idle cell header (00 00 00 01h) will be used in fill
cells. When 1, a programmable header will be used in fill cells. The setting of this bit does not affect the contents of
the cell payload bytes.
Bit 4: Transmit Fill Cell Payload Type (TFCP) – When 0, an idle cell payload byte (6Ah) will be used in each
payload byte fill cells. When 1, a programmable cell payload byte will be used in each payload byte fill cells. The
setting of this bit does not affect the contents of the cell header bytes.
Bit 3: Transmit Cell Header Scrambling Enable (THSE) – When 0, only the cell payload will be scrambled. When
1, the entire data stream (cell header and payload) is scrambled. This bit is ignored if scrambling is disabled, or
DSS scrambling is enabled. When cell pass-through mode is enabled, the entire data stream will be scrambled if
scrambling is enabled.
Bit 2: Transmit Scrambling Disable (TSD) – When 0, scrambling is performed. When 1, scrambling is disabled.
Bit 1: Transmit Bit Reordering Enable (TBRE) – When 0, bit reordering is disabled (The first bit transmitted is
from the MSB of the transmit FIFO byte TFD[7]). When 1, bit reordering is enabled (The first bit transmitted is from
the LSB of the transmit FIFO byte TFD[0]).
Bit 0: Transmit Pass-Through Enable (TPTE) – When 0, pass-through mode is disabled and cell processing is
enabled. When 1, all cell processing functions except scrambling and bit reordering are disabled and the cell
processor is in pass-through mode.