DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 133
DS3163
Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3163.pdf
(384 pages)
Specifications of DS3163
Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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DS3161/DS3162/DS3163/DS3164
packet data, and RPRTY indicates the data bus parity. All signals are sampled and updated using RSCLK. The
data bus is always driven.
In POS-PHY Level 3 (or SPI-3) the Receive System Interface Bus Controller determines which port to transfer data
from using a round-robin arbitration scheme (the ports are checked one after another in numerical order according
to their line number x. A transfer is initiated from a port when it is not almost empty (contains more data than the
almost empty level or contains an end of packet). Transfer from a port is terminated when the maximum burst
length has been transferred, the FIFO is emptied, or an end of packet is transferred while the Receive FIFO is
almost empty (contains the same or less data than the almost empty level and does not contain an end of packet).
When a transfer is terminated, a transfer is initiated from the next available port that is not almost empty. At the end
of a packet or between a transfer from one port and the transfer from the next port, RVAL will go low for a
programmable number of clock cycles (0-7) to allow the POS-PHY master to halt data transfer. At the end of a
packet, data transfer will continue from the same port if the port is not almost empty. When the maximum burst
length has been transferred, data transfer will continue from the same port if no other port has data available, and
the port is not almost empty. The maximum burst length is programmable (8 – 256 bytes in four byte increments),
or can be disabled.
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