DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 46

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TOHSOFn
TOHCLKn
TOHENn
TOHn
PIN
TYPE
O
O
I
I
the positive clock edge of the referenced clock pin if the clock pin signal is not
inverted, otherwise it is sampled on the falling edge of the clock. The signal is typically
referenced to the RLCLKn line clock input pins, but it can be referenced to the
RCLKOn output pins.
This input signal can be inverted.
o
o
o
RLCVn: When the port line interface is configured for UNI mode and the framer is not
configured for one of the “-OHM” modes, the BPV counter in the encoder/decoder
block is incremented each clock when this signal is high. The signal is sampled on the
positive clock edge of the referenced clock pin if the clock pin signal is not inverted,
otherwise it is sampled on the falling edge of the clock. The signal is typically
referenced to the RLCLKn line clock input pins, but it can be referenced to the
RCLKOn output pins.
This input signal can be inverted.
ROHMIn: When the port framer is configured for one of the “-OHM” modes, this signal
is used to mark the overhead bits on the RDATn pins when it is high. The DS316x
will ignore overhead bits. The signal is sampled on the positive clock edge of the
referenced clock pin if the clock pin signal is not inverted, otherwise it is sampled on
the falling edge of the clock. The signal is typically referenced to the RLCLKn line
clock input pins, but it can be referenced to the RCLKOn output pins.
This input signal can be inverted.
Transmit Overhead / Line OH Mask Input
TOHn: When the port framer is configured for one of the DS3 or E3 framing modes,
this signal will be used to over-write the DS3 or E3 framing overhead bits when
TOHENn is active. In T3 mode, the X-bits, P-bits, M-bits, F-bits, and C-bits are input.
In G.751 E3 mode, all of the FAS, RAI, and National Use bits are input. In G.832 E3
mode, all of the FA1, FA2, EM, TR, MA, NR, and GC bytes are input. The TOHSOFn
signal marks the start of the framing bit sequence. This signal is sampled at the same
time as the TOHCLKn signal transitions high to low.
This signal can be inverted.
Transmit Overhead Enable / Start Of Frame Input
TOHENn: When the port framer is configured for one of the DS3 or E3 framing
modes, this signal will be used the determine which DS3 or E3 framing overhead bits
to over-write with the signal on the TOHn pins. The TOHSOFn signal marks the start
of the framing bit sequence. This signal is sampled at the same time as the TOHCLKn
signal transitions high to low.
This signal can be inverted.
Transmit Overhead Clock
TOHCLKn: When the port framer is configured for one of the DS3 or E3 framing
modes, this clock is used for the transmit overhead port signals TOHn, TOHENn and
TOHSOFn. The TOHSOFn output signal is updated and the TOHn and TOHENn
input signals are sampled at the same time this clock signal transitions from high to
low. The external logic is expected to sample TOHSOFn signal and update the TOHn
and TOHENn signals on the rising edge of this clock signal. This clock is a low
frequency clock.
This signal can be inverted.
Transmit Overhead Start Of Frame
TOHSOFn: When the port framer is configured for one of the DS3 or E3 framing
modes, this signal is used to mark the start of a DS3 or E3 overhead sequence on the
TOHn pins. In T3 mode, the first X-bit is marked. In G.751 E3 mode, the first bit of
the FAS word is marked. In G.832 E3 mode, the first bit of the FA1 byte is marked.
The sequence starts on the same high to low transition of the TOHCLKn clock that
this signal is high. This signal is updated at the same time as the TOHCLKn signal
DS3: 44.736 Mbps +20ppm
E3: 34.368 Mbps +20ppm
CC52: 52 Mbps +20ppm
DS3/E3 OVERHEAD INTERFACE
FUNCTION