DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 314

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 0: Out Of Frame Interrupt Enable (OOFIE) – This bit enables an interrupt if the OOFL bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 10: Receive Z6 Byte Interrupt Enable (RZ6IE) – This bit enables an interrupt if the RZ6L bit is set and the bit
in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. (This bit is unused in E3 mode).
Bit 9: Receive Z5 Byte Interrupt Enable (RZ5IE) – This bit enables an interrupt if the RZ5L bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. (This bit is unused in E3 mode).
Bit 8: Receive Z4 Byte Interrupt Enable (RZ4IE) – This bit enables an interrupt if the RZ4L bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. (This bit is unused in E3 mode).
Bit 7: Receive Z3 Byte Interrupt Enable (RZ3IE) – This bit enables an interrupt if the RZ3L bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 6: Receive Z2 Byte Interrupt Enable (RZ2IE) – This bit enables an interrupt if the RZ2L bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 5: Receive Z1 Byte Interrupt Enable (RZ1IE) – This bit enables an interrupt if the RZ1L bit is set and the bit in
GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 4: Receive M2 Byte Interrupt Enable (RM2IE) – This bit enables an interrupt if the RM2L bit is set and the bit
in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
Bit 3: Receive M1 Byte Interrupt Enable (RM1IE) – This bit enables an interrupt if the RM1L bit is set and the bit
in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
RZ3IE
15
--
0
7
0
RZ2IE
14
--
0
6
0
PLCP.RSRIE2
PLCP Receive Status Register Interrupt Enable #2
(1,3,5,7)6Eh
RZ1IE
13
--
0
5
0
RM2IE
12
--
0
0
4
RM1IE
11
--
0
3
0
RZ6IE
RF1IE
10
0
2
0
LSSIE
RZ5IE
9
0
1
0
RZ4IE
LSSUIE
8
0
0
0