DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 380

• Manufacturer Part Number: DS3163
• Description: IC TRPL ATM/PACKET PHY 400-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3163

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.6 Micro Interface AC Characteristics
The AC characteristics for the external bus interface.
Table 18-7. Micro Interface Timing
(V
Note 1:
Note 2:
Note 3:
Note 4:
A[N:0]
ALE
A[N:0]
A[N:0]
ALE
A[N:0], ALE
CS, R/W
D[15:0]
RD, WR, DS
RD, WR, DS
D[15:0]
CS, R/W
D[15:0]
D[15:0]
RDY
RDY
RDY
RDY
RDY
R/W
R/W
DD
NAME(S)
SIGNAL
= 3.3 ±5%, Tj = -40°C to 125°C.)
The input/output timing reference level for all signals is VDD/2. Transition time (80/20%)on RD , WR and CS inputs is 5 ns max.
Multiplexed mode timing only.
D[15:0] output valid until not driven.
Timing required if not using RDY handshake.
SYMBOL
t1a
t1b
t9a
t9b
t10
t12
t13
t14
t15
t16
t17
t18
t19
t20
t21
t2
t3
t4
t5
t6
t8
Setup Time to RD, WR, DS Active
Setup Time to RD, WR, DS Active
Setup Time to ALE Inactive
Hold Time from ALE Inactive
Pulse Width
Hold Time from RD, WR, DS Inactive
Setup Time to RD, WR Active
Output Delay Time from RD, DS Active
Pulse Width if not Using RDY Handshake
Delay from RDY
Output Deassert Delay Time from RD, DS
Inactive
Hold Time from RD, WR, DS Inactive
Input Setup Time to WR, DS Inactive
Input Hold Time from WR, DS Inactive
Delay Time from RD, WR, DS Active
Delay Time from RD, WR, DS Inactive
Enable Delay Time from CS Active
Disable Delay Time from CS Inactive
Ending High Pulse Width
Setup Time to DS Active
Hold Time to DS Inactive
DESCRIPTION
MIN
10
10
35
15
10
2
2
5
0
0
2
0
5
5
0
1
2
2
TYP
MAX UNITS NOTES
30
10
12
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1,2
1,2
1,2
1,2
1,4
1,3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1